The disclosure relates generally to voltage reference structures for field effect transistors (FETs). More specifically, embodiments of the present disclosure include a voltage reference device implemented using fully depleted transistor technology. Fully depleted transistor technology is most commonly fabricated in FinFET CMOS and fully depleted semiconductor on insulator (FDSOI) substrates.
A voltage reference is an electronic device that ideally produces a fixed (i.e., constant) voltage irrespective of the loading on the device, manufacturing process tolerances, power supply variations, temperature changes, and the passage of time. In VLSI technologies, p-n diodes have traditionally been used to provide such a voltage reference due do their ease of manufacturing and predictable behavior.
In more advanced technologies, such as SOI structures and FinFET technologies, it becomes more challenging to make a p-n diode operate in a predictable manner. Instead, additional processing steps are required that add significant cost to the manufacturing process. Accordingly, a need exists for a more cost effective solution for implementing a voltage reference structure in such advanced technologies.